This invention relates to a device for generating a given cyclic signal in synchronism with a reference signal applied to the device.
A device for generating a given cyclic signal is widely used in many technical fields. One typical example of such device is a synchronizing generator for regulating or governing the operation of a ghost canceller of TV receivers. In such synchronizing generator it is necessary to produce timing signals having exact and strict timing relation to a sync signal contained in a video signal. In compliance with this necessity, a synchronizing generator is usually furnished with a code converter or ROM for providing the timing signals and a counter for designating addresses of the ROM. The counter is reset or preset to a certain given value by, e.g., a horizontal sync signal, thereby the cyclic period of said timing signals is forcibly synchronized with the horizontal sync signal. Since, however, the sync signal is often subjected to jitter due to wow/flutter of VTR or ghost signals, if the counter is always reset (or preset) by such sync signal, the timing signals will suffer influence of the jitter.
To minimize the unfavorable influence of jitter, where the reset (preset) by a sync signal is once completed, then the sync signal applied to the counter is inhibited or masked by a masking pulse. The masking pulse is generated from the ROM at the timing of, e.g. count-start of the counter. Thus, once the counter is reset (preset) by one sync signal, then the subsequent sync signals are masked by the masking pulses, and the counter is continued to repeat its cyclic count operation independent of the sync signal. Accordingly, so long as the sync signal is masked, the counter is not influenced by the jitter of sync signals.
Now, following assumption are made to clarify the problem of prior art.
case 1 (FIG. 1A)
a masking pulse P1A and a reset pulse P2 have pulse widths of 0.2 .mu.s and 0.1 .mu.s, respectively.
case 2 (FIG. 1B)
a masking pulse P1B and a reset pulse P2 have pulse widths of 6 .mu.s and 0.1 .mu.s, respectively.
In case 1, if the reset pulse P2 appears at the time the masking pulse P1A appears, the pulse P2 is maked by the pulse P1A, and the counter is not reset by the pulse P2. Where the timing of appearance of the reset pulse does not coincide with that of the masking pulse P1A, the counter is reset by such unmasked reset pulse (P2a or P2b). That is, the counter is sensitive to jittering in excess of the pulse width of 0.2 .mu.s. In this case, although the counter is liable to be influenced by the jitter, the timing discrepancy between the count-start of said counter and the appearance of reset pulse P2 can be restricted within 0.2 .mu.s at most.
In case 2, the counter is not influenced by the jitter of reset pulse P2 unless the jittering exceeds 6 .mu.s pulse width of the masking pulse P1B. However, the timing discrepancy between the count-start and the reset pulse appearance could be large (6 .mu.s), and timing error of 6 .mu.s at maximum cannot be avoided.
As seen from above two cases, it will be understood that the requirement as to insensitivity for jitter is contradictory to that as to small timing error.